The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 04, 1977
Filed:
Oct. 26, 1976
Julius Lange, Sunnyvale, CA (US);
Ford Motor Company, Dearborn, MI (US);
Abstract
An adaptive equalizer for improving the quality of digital data contained in an electrical input signal supplied to the equalizer. The equalizer compensates for amplitude and delay distortion affecting the quality of the digital data contained in the electrical input signal. The equalizer includes a delay line having a plurality of discrete time delay elements and in a plurality of taps coupled to the delay elements. A clock circuit provides a plurality of clock signals of identical frequency but different phase, thereby, dividing a pre-selected time interval into a plurality of time-slots. A sequential switch controlled by the clock signals sequentially connects the delay line taps to a quality detector which also has as an input the equalizer output signal. The quality detector generates a signal, during each of the time slots, that represents the quality of the equalizer output signal. The criteria for the equalizer output signal quality is its squareness, and the quality detector output signals are used to control counters which may be incremented or decremented, as required, to improve the equalizer output signal quality. The digital outputs from the counters are supplied to digital-to-analog converters and the resulting analog signals are applied to voltage controlled amplifiers. The signals from the delay line taps are applied to the voltage controlled amplifiers in the equalizer and thereafter are summed to produce the equalizer output signal. The adjustment of the counters either up or down changes the gain of the voltage controlled amplifiers to improve the squareness of the equalizer output signal in a closed-loop manner. The preferred form of the equalizer of the invention is used to improve the quality of two channels of digital data obtained from the demodulation of a transmitted signal that is quadrature-phase-shift keyed. Thus, the two channels of data have identical data bit rates.