The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 1977

Filed:

Jun. 25, 1976
Applicant:
Inventor:

Ronald W Russell, Sunnyvale, CA (US);

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03F / ; H03F / ;
U.S. Cl.
CPC ...
330 23 ; 330 / ; 330 35 ;
Abstract

An offset adjustment circuit for a differential amplifier includes a current source connected in series with a resistor for establishing a biasing voltage for a pair of field effect transistors (FET) having variable resistors in their biasing circuits. These FET's are connected to introduce currents respective connections between an input stage and a second stage of the differential amplifier. The difference of the currents supplied by the FET's divided by the transconductance of the input stage of the differential amplifier corresponds to an offset which remains fixed with changes in temperature. The offset introduced by the FET's, as determined by the adjusted values of the resistors in their biasing circuits, may be in opposition to the offset of the differential amplifier to either reduce it partially or completely, or it may be additive to the offset of the differential amplifier, as desired.


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