The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 13, 1977
Filed:
Jul. 14, 1976
Francis T Thompson, Murrysville, PA (US);
Michael B Brennen, Pittsburgh, PA (US);
Westinghouse Electric Corporation, Pittsburgh, PA (US);
Abstract
A set-reset flip-flop is taught utilizing NAND gate logic elements and an internally connected resistor-capacitor circuit. The time constant of the resistor-capacitor network is such that valid triggering pulses for the input terminal of the flip-flop will not be propagated through the flip-flop to change the output state thereof unless the pulses are of a minimum duration. The duration of such pulses are chosen to be significantly larger than the duration of expected random noise which may appear on the input terminal of the flip-flop. Such being the case, noise signals are not propagated through the flip-flop to change the state thereof. A discharge network is provided for the capacitor to quickly discharge the capacitor at the termination of each input pulse, whether noise or triggering, so that an accummulaton of noise pulses will not cause a shift in the output of the flip-flop.