The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 13, 1977

Filed:

May. 03, 1976
Applicant:
Inventor:

Hans-Wilhelm Bleckmann, Frankfurt, DT;

Assignee:

ITT Industries, Inc., New York, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
B60T / ;
U.S. Cl.
CPC ...
303 97 ; 303 20 ; 3072 / ; 324161 ; 361238 ;
Abstract

A digital phase-locked loop for speed measurement, in particular for use in antiskid control systems, for the conversion of the frequency of an input pulse sequence, proportional to a speed, into a digital numerical value to be used in the digital arithmetic unit for an antiskid control system is provided wherein there is a certain numerical value which will always be the same which is allocated to any input pulse sequence and which can be applied to a first storage register and added to the contents therein. At regular intervals, determined by a clock generator, a positive digital output numerical value is generated by a detector if the content of the first storage register is above a predetermined upper limit and a negative digital output numerical value will be generated if the contents of the first storage register are below a predetermined lower limit. Furthermore, the respective digital output numerical value of the detector can be added to the content of a second storage register, observing a correct sign. The contents of the second storage register are at digital numerical value corresponding to the frequency of the input pulse sequence, with that digital numerical value always being subtracted from the content of the first storage register upon each clock pulse generated by the clock generator.


Find Patent Forward Citations

Loading…