The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 06, 1977
Filed:
May. 30, 1972
Lowell W Bauer, Liverpool, NY (US);
John P Costas, Fayetteville, NY (US);
General Electric Company, Syracuse, NY (US);
Abstract
A signal processor is described for pulse-echo systems such as sonar and seismographic systems in which wave energy is transmitted and received as a train of discrete pulses of different frequencies ordered in predetermined sequence. The receiver comprises a plurality of signal processing channels each of which selects one subpulse and delays it through an interval of duration inversely related to its time position in the pulse train, to thus bring the received subpulse signals into time alignment so that when added their summed amplitude constitutes the target signal output. For interference level compensation, a running estimate is made of the interference level in each of the signal processing channels, and the channel signals then are weighted by this interference estimate as an inverse function of its magnitude. Interference level compensation in this manner provides optimized target visibility but may result in variation of signal levels in the doppler processing output channels, both channel-to-channel and within each channel as a function of range, so that if the processor output were directly displayed target returns of equal strength could be given unequal prominence in the display depending on their specific range and doppler values. Normalization to avoid this is accomplished by feed-forward of running estimates of the mean and variance signal values and combination thereof in particular relationship with the processor output to yield zero mean and unit variance in signal level outputs of the processor.