The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 21, 1977

Filed:

Apr. 24, 1974
Applicant:
Inventor:

Allen C Hirtle, Needham, MA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364200 ;
Abstract

A host system includes a plurality of memory cells, each reserved for a different one of a plurality of peripheral control devices of a target system. During the running of a target system program, the host system being emulated includes means for switching one of the memory cells reserved for a particular peripheral control upon detection of an interrupt condition resulting from the execution of a target system input/output instruction. Each time an interrupt condition causes the switching of one of these cells, the host system increments by one the contents of a counter representative of a bus present in the target system. Each time one of the cells of a bus is reset or cleared, the host system decrements by one the corresponding counter contents. A count of zero stored in the counter simulates the condition of a binary ZERO of providing a logical OR operation upon all of the interrupt signals of the peripheral devices connected to share the same target system bus while a non zero count stored in the counter simulates a binary ONE of performing a logical OR operation upon the interrupt signal lines on the bus.


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