The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 07, 1977

Filed:

Mar. 12, 1975
Applicant:
Inventors:

Gerard Cachier, Paris, FR;

Jean Paul Puron, Paris, FR;

Assignee:

Thomson-CSF, Paris, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ; H03K / ;
U.S. Cl.
CPC ...
307205 ; 307214 ; 307215 ; 307304 ;
Abstract

A NOR or a NAND gate of integrated circuit type, having a fan-out of at least three and with a propagation time in the order of 1 nanosecond for a power consumption of a fraction of a milliwatt, is provided. The gate comprises an inverter stage supplied by a saturable load, and an amplifier stage injecting into a diode and into a saturable load connected in such a fashion as to effect a voltage shift. At the input, there are field-effect transistors of low threshold voltage (-0.2 volts), drawing two microamps at zero gate voltage. For the remainder of the circuit, field-effect transistors having a higher absolute threshold voltage (-0.6 volts) are used, these being designed to draw a very low current at a supply voltage of 1.5 volt.


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