The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 17, 1977

Filed:

Dec. 19, 1975
Applicant:
Inventors:

Klaus Heuber, Boeblingen, DT;

Knut Najmann, Gaertringen, DT;

Rolf Remshardt, Boeblingen, DT;

Klaus Tertel, Altdorf, DT;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02H / ; H01L / ;
U.S. Cl.
CPC ...
307303 ; 3072 / ; 357 48 ;
Abstract

This describes an integrated semiconductor structure having an epitaxial semiconductor layer, divided into regions by isolation zones and containing active and passive semiconductor devices, of a first conductivity type on a substrate of the opposite second conductivity type. A reference potential and first and second supply voltages are applied to the structure. An additional isolated transistor, in accordance with this invention prevents an unlimited current flow, via the chip isolation junction, from one voltage supply to the other when the power-on sequence for both voltages is undefined. The base of this additional transistor is connected to one of the voltages via an integrated resistor while the other voltage is connected to the emitter and the collector is connected to the substrate via the isolation zone. Thus, the isolation junction can never become forward biased. In addition, this arrangement ensures that the substrate potential is independent of the rate of the above-mentioned substrate current, and perfect isolation is guaranteed under all conditions.


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