Electronic calculator or digital processor chip having test mode of

Abstract

An MOS/LSI semiconductor chip for providing the functions of an electronic calculator or digital processor includes a data memory, an arithmetic unit for executing operations on data, and a control arrangement for defining the functioning of the machine including a ROM for storing a large number of instruction words, and control decoders for receiving instruction words from the ROM and producing various commands for the control arrangement. Separate X and Y address registers are provided for selecting the location in the ROM for the next instruction. Input and output terminals are provided, as for keyboard input, and display output. A test mode of operation is provided for quality control upon completion of manufacture of the chip. The test mode allows the entire ROM to be tested by reading in addresses to the address registers from external, loading the resulting instruction word into the Y address register, and reading out the instruction word from the Y register, all under control of simulated keyboard inputs using the standard terminals. Further, normal operating sequences can be initiated by simulating a branch to the desired location and allowing the system to continue under its own control for a selected operation.