The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 17, 1977

Filed:

Aug. 28, 1975
Applicant:
Inventors:

Nobuharu Obayashi, Hamamatsu, JA;

Hikaru Hashizume, Hamamatsu, JA;

Noriji Sakashita, Hamamatsu, JA;

Seiji Kameyama, Hamamatsu, JA;

Sadaaki Ezawa, Hamamatsu, JA;

Toshio Kugisawa, Hamamatsu, JA;

Yutaka Washiyama, Hamamatsu, JA;

Tatsunori Kondo, Hamamatsu, JA;

Hironori Watanabe, Hamamatsu, JA;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G10H / ;
U.S. Cl.
CPC ...
84-101 ; 84-126 ;
Abstract

A tone source apparatus is provided for an electronic musical instrument. It comprises a memory circuit which has a plurality of addresses and is so arranged that where at least one cycle of a musical tone waveform is divided into p units and a waveform in each section range is represented by a formula containing the abscissa as its variable, a coefficient and a section range quantum number of each formula is memorized in the form of digital signals in the corresponding address. Also included are a clock pulse oscillator, a counter means for counting output clock pulses of the clock pulse oscillator, and a coincidence circuit serving to generate the coincidence signal when the output digital signal of the counter means and a digital signal of the section range quantum number memorized in the memory circuit coincide with one another. A decoder designates the next stage address in order by output signals of the coincidence circuit. A calculation circuit is used for calculating a digital signal from the counter means and a coefficient digital signal from the designated address. A D-A convertor converts the output digital signal of the calculation circuit into a corresponding analog signal. The addresses in the memory circuit have memory portions which memorize as digital signals respective coefficients of n degree multiple term formulae for respective section ranges, and respective section range quantum numbers.


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