The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 26, 1977

Filed:

Jul. 02, 1975
Applicant:
Inventors:

Yasoji Suzuki, Ayase, JA;

Kenshi Manabe, Yokohama, JA;

Masataka Hirasawa, Yokohama, JA;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
3072 / ; 3072 / ; 3072 / ;
Abstract

A counter comprises a cascade connection of an inverter stage and n one-bit shift register stages, the latter being operative in response to clock signals to be counted and each having a data-readin or front half-bit shift register stage and a data-readout or rear half-bit shift register stage. The output of the final stage in the cascade connection is coupled to the input of the first stage in the cascade connection. The output of the final stage is also coupled to an additional input of consecutive 1st to X-th shift register stages or consecutive 2nd to (X-1)-th shift register stages of an X-th shift register stage to constitute a scale-of-2n-X or 2n-(X-1) counter.


Find Patent Forward Citations

Suzuki, Yasoji. (1977). Counter using an inverter and shift registers (U.S. Patent No. 4020362). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4020362

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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