The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 19, 1977
Filed:
Feb. 13, 1975
Ronald D Long, San Jose, CA (US);
Allan L Swain, Palo Alto, CA (US);
Thomas C Lyon, San Jose, CA (US);
Consolidated Video Systems, Inc., Sunnyvale, CA (US);
Abstract
A method and apparatus for synchronizing unrelated video type signals from two different sources without employing feedback loops between the two sources. Incoming video signals are converted from analog to digital form and are clocked into a shift register unit by input clock signals phase and frequency locked to the instantaneous horizontal frequency and the color burst frequency portions of the incoming signal. The digitized video signals progressing along the shift register are stored at the input clock signal rate in a random access (RAM) having a sufficient capacity to provide continuous output video signals during each field. The signals are clocked out from the RAM by output clock signals derived from the sync and color burst portions of a local signal comprising either composite video or composite color burst, which are synchronized with the local sync generator. The video signals fetched from the RAM are converted from digital to analog form by the output clock signals, are processed to include standard sync, blanking and color burst signals, and are coupled to follow-on equipment. The sync burst portions of the incoming non-synchronized video signals are deleted during storage in the shift register so that a smaller shift register can store an entire video field. The shift register has a plurality of output taps providing different coarse delay periods only one of which is enabled by a vertical sync pulse in the output clock train prior to transfer of a given field into the RAM.