The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 12, 1977
Filed:
Jul. 18, 1975
Gerald K Miller, Hersey, MI (US);
Nartron Corporation, Reed City, MI (US);
Abstract
A timing circuit is shown as employing a flip-flop for driving an output circuit portion as to have such output circuit portion in effect provide either a low or no output or a high output with such in turn being employed for turning on or turning off a related power circuit; a first high gain amplifier is employed as a means for placing the flip-flop into one of its states whenever an appropriate trigger signal is momentarily applied thereto, while a second high gain comparator amplifier is effective to provide a reset signal to the flip-flop whenever a particular span of time has elapsed from the application of the trigger signal; the timing for creating the reset signal is achieved as through an R-C network which provides, in effect, a threshold signal to the second amplifier upon the application of which the second amplifier produces the reset signal and applies it to the flip-flop thereby placing the output circuit portion in a condition wherein it has either a low or no output. Additional defeat or inhibiting means are provided to cause the output circuit portion to be placed in such a condition of either low or no output even if the timing phase of the overall cycle has not been completed.