The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 05, 1977

Filed:

Oct. 31, 1975
Applicant:
Inventors:

John Robert Cielo, Kingston, NY (US);

John Andrew Orfitelli, New Paltz, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F / ; H03K / ;
U.S. Cl.
CPC ...
323 17 ; 307240 ; 321 13 ; 323D / ;
Abstract

A power translating circuit of the general kind utilized in transformer coupled transistor switching regulators has a source of DC, the primary of a transformer and a switching transistor in series. To protect the transistor from excessive power dissipation during its turnoff transition, a surge diverting path including a diode poled oppositely to the transistor is provided in parallel with the transistor, the diode being in forward conduction at the beginning of turnoff of the transistor and becoming back-biased as the transistor turns off, the reverse conductivity of the diode during its recovery serving as a temporary path diverting some of the power dissipation at turnoff away from the transistor.


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Cielo, John. (1977). Pulse energy suppression network (U.S. Patent No. 4016482). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4016482

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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