Framing circuit for digital receiver

Abstract

In the T1 PCM carrier system there are 193 bits per frame, 192 of which are used for the channels. The D1 channel bank uses the 193rd bit to identify the division between frames, with a pattern from frame to frame of . . . 010101 . . . . The D2 channel bank uses the 193rd bit of alternate frames, or every 386th bit for framing. Both D1 and D2 have a framing circuit to identify the framing bit by the pattern with a normal mode and a search mode. There is a violation monitor for comparing the pattern of framing bits from frame to frame and indicating a violation if there is a deviation. In the normal mode only the framing bits are examined, and some error tolerance is allowed. Violations are registered in a memory device to check if a preset threshold is exceeded. When the threshold is exceeded, a misframe is declared, and the circuit goes into a search mode to examine other bit positions for the framing pattern. No error tolerance is allowed in the search mode. After a framing pattern is found, a confidence circuit with a memory checks whether the pattern persists for a predetermined number of frames before returning to the normal mode, and searching other bit positions if the pattern does not persist.