Clock signal extraction during playback of a self-clocking digital

Abstract

A clock signal extraction circuit for extracting a clock signal from a reproduced self-clocking digital recording while masking unwanted data transitions from the extracted clock signal. A plurality of input single-shots are selectively operated to produce control signals having respective durations for controlling the gating of a reproduced self-clocking input signal. The gating of the input signal allows only the clock signal transitions in the input signal to be applied to a clock signal output. The single-shots are selected by a comparator circuit which sequentially compares the time of occurrence of the extracted clock signal to each of a plurality of nominal occurrence times equal in number to the number of input single-shots to be controlled thereby.