The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 22, 1977

Filed:

Jun. 20, 1975
Applicant:
Inventors:

Atsuo Tanaka, Kanagawa, JA;

Koichi Tokura, Chiba, JA;

Hiroki Kawahara, Kawasaki, JA;

Assignee:

Fujitsu Ltd., Kawasaki, JA;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; G11C / ;
U.S. Cl.
CPC ...
3401725 ;
Abstract

A control unit supplies information and includes a memory for storing information. A data bus connected to the control unit transfers the information. A controlled unit connected to the data bus receives information transferred from the control unit. The controlled unit comprises a plurality of n circuit stages, wherein n is a whole number, connected in tandem. The controlled unit includes first to n.sup.th circuit stages and an i.sup.th circuit stage intermediate the first and n.sup.th circuit stages and designated by the control unit. Information transferred from the control unit is stored in the first circuit stage and is transferred sequentially from the first to the i.sup.th circuit stages. Information stored in the first to (i-1).sup.th circuit stages is transferred to the memory of the control unit via the data bus for storage in the memory when the control unit requires alteration of information stored in the i.sup.th circuit stage. Alternative information is transferred from the control unit to the first circuit stage. The information stored in the memory of the control unit is sequentially transferred to the first circuit stage thereby shifting the alternative information to the i.sup.th circuit stage.


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