The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 01, 1977
Filed:
Mar. 10, 1975
John J Flaherty, Elk Grove Village, IL (US);
Eric J Strauts, Chicago, IL (US);
Magnaflux Corporation, Chicago, IL (US);
Abstract
Automatic balancing circuits are provided for non-destructive testing systems such as eddy current systems in which an unbalance of a probe circuit including a test coil produces undesired deviations from a null indication. Error signal components are generated from a probe circuit output signal, stored in storage means and then applied in a balancing direction to cancel the effect of the unbalance of the probe circuit. Preferably, the error signal components are generated by a pair of quadrature phase detectors and the storage means comprises either a capacitor or the combination of digital storage and digital-analog converter means. The balancing is performed either automatically, with a delay in the storage operation, or by operation of a switch means between a sample or null condition in which the error signals are stored and a hold condition in which the stored error signals are applied. In one embodiment, the stored error signals are used to modulate AC signal components in quadrature phase relation which are applied in a balancing direction. In another, the stored error signals are developed from phase detector output signals and then combined therewith. In both embodiments, balancing signals are combined with signals derived from the probe circuit output signal and applied at points preceding high gain amplification in signal processing circuitry.