The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 04, 1977
Filed:
Jan. 08, 1976
Tatsuo Maruyama, Tokyo, JA;
Hiroshi Sasaki, Kashiwa, JA;
Abstract
An asynchronous delay circuit, in which a flip-flop circuit of the latch type is employed to store logical values of two transmission lines. The logical values of the two transmission lines are applied through two gates to the flip-flop circuit only when the flip-flop circuit is previously established to an empty state where logical values of the two outputs of the flip-flop circuit are coincident with each other. The flip-flop circuit may be formed by two NOR circuits or two NAND circuits. A plurality of the above mentioned asynchronous delay circuits may be successively connected in a cascade arrangement by further including differentiators, first connection lines, second connection lines, third connection lines and an input circuit to form an elastic store.