Line concentrator for dealing with asynchronous and synchronous data

Abstract

A line concentrator for a time division data switching exchange. Asynchronous and synchronous data signals generated at asynchronous and synchronous data terminals are subjected to known multi-point and synchronous sampling to become a train of bit-multiplexed first asynchronous and synchronous data channel signals. Responsive to a train of bit-interleaved read-in pulse groups timed relative to the respective synchronous data signals, an arithmetic unit stores the data channel signals in an octet memory according to the asynchronous and synchronous data terminals. Responsive to a train of read-out pulses appearing for the respective data terminals, the arithmetic unit reproduces groups of uninterleaved data channel signals for each data terminal and composes the reproduced data channel signals into a train of second asynchronous and synchronous data channel signals given by a common and uninterleaved bit format. The line concentrator is readily modified for decomposition of a train of asynchronous and synchronous data channel signal groups of the bit format into replicas of the original data signals.