Data display system having a multilevel video storage device

Abstract

A radar return signal is analyzed by amplitude comparators so as to classify the radar return signal with respect to 2.sup.n -1 threshold levels to thus produce n parallel bits for each classification defining the instantaneous amplitude of the radar return signal. The bits in a given significant bit position (most significant, least significant, etc.) comprise a word which moves through the video storage device serially with respect to bits in the same significant bit position and in parallel with respect to bits in the word comprised of different significance bits. Input buffers in the form of n storage registers are provided, each storage register being associated with a particular bit significance. The bits are entered into their associated storage register at a rate dependent upon the desired radar range. The bits are optionally integrated on a bit-by-bit basis and then entered into a main memory having n circulating storage registers arranged in parallel. The information stored in the main memory is subsequently recalled and conveyed through output buffers for display on a cathode ray tube. The output buffers are comprised of n further storage registers. Each of these further storage registers is associated with a particular circulating storage register. The bits from a circulating storage register are conveyed to its associated further storage register. The bits in the output buffers are subsequently passed into a digital to analog converter, the output of the converter being applied to the cathode ray tube for display.