The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 18, 1976
Filed:
Mar. 21, 1975
Joseph H Johnson, Sunnyvale, CA (US);
Varian Associates, Palo Alto, CA (US);
Abstract
In a radio frequency transistor package, a layer of metallization is deposited on an electrically insulative thermally conductive ceramic substrate member serving as a heat sink. An insular region of the metallization serves as a pad for receiving a transistor die with the collector region of the transistor bonded to the insular region of metallization. The region of the metallization surrounding the pad comprises a ground plane. An apertured ceramic insulative spacer is bonded over the ground plane metallization with the aperture in registration over the transistor. Input, output and a pair of common lead metal strips are bonded to the upper surface of the spacer in generally coplanar configuration. The two common leads extend across the spacer adjacent opposite sides of the aperture in generally tangential relation thereto. The input and output leads are disposed in between the common leads and are interrupted by the central aperture in the spacer. The common leads are electrically interconnected to the ground plane metallization layer via conductive means extending through the aperture in the spacer. The input lead is connected to one of the base or emitter regions of the transistor die via wire bonding leads extending through the aperture in the spacer. The other base or emitter region of the transistor die is connected via parallel wire bonding leads to the surrounding ground plane metallization. The output lead is connected via a set of parallel wire bond leads through the central aperture to the transistor pad.