Analogue shift register correlators

Abstract

Semiconductor charge devices are defined to effect a serial-to-parallel conversion of analogue signal information. In one aspect of the invention, a digital signal is extracted from an analogue noise environment by a shift register correlator comprising a bucket-brigade configuration of field-effect transistors in combination with gating field-effect transistors which are effective to weight the amplitude of the data in corresponding bits of the shift register. The gates of the gating transistors are selectively connected to diffused regions of transistors of the bucket-brigade delay line to effect parallel tapped outputs therefrom. The weighted signals from the gating transistors are summed at a common terminal to form the auto-correlated output. In a different aspect of the invention, the analogue delay line is effected by a charge-coupled shift register, parallel taps being obtained from diffused regions under selected electrodes of the shift register ohmically connected to gates of the gating field-effect transistors.