The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 17, 1976

Filed:

Feb. 21, 1974
Applicant:
Inventor:

John Charles Peer, Indianapolis, IN (US);

Assignee:

RCA Corporation, New York, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01J / ; H01J / ;
U.S. Cl.
CPC ...
315397 ; 315407 ; 315387 ; 330 13 ; 330 17 ; 3302 / ;
Abstract

A class D amplifier, suitable for use as a vertical deflection amplifier in a television receiver, includes two transistors coupled to function in a push-pull manner. Two diodes are serially coupled with each other in parallel with the output transistors and are poled to conduct forward current in a direction opposite to the forward current of the two transistors. A junction of the two transistors is coupled to a junction of the two diodes and forms an output terminal to which a deflection winding is coupled. A series of pulses at a first frequency, such as the horizontal deflection frequency or a multiple thereof, are pulse width modulated in accordance with the amplitude of a sawtooth waveform at a second frequency, such as the vertical deflection frequency, in a pulse width modulation stage and are coupled to the input terminals of the two transistors. The two transistors are alternately enabled for conduction by the pulse width modulated signals. During the first half of the vertical scan interval when average deflection current is flowing in a first direction through the deflection winding, the first transistor conducts current in the forward direction and the second transistor and its associated diode conduct current in their reverse and forward directions, respectively. During the second half of vertical scan with the average deflection current flowing in the opposite direction, the second transistor conducts current in its forward direction and the first transistor and its associated diode conduct current in their reverse and forward directions, respectively, for minimizing crossover distortion at the middle of the vertical scan interval.


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