The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 10, 1976

Filed:

Jun. 18, 1974
Applicant:
Inventor:

Thaddeus Hawkes, Paris, FR;

Assignee:

Thomson-CSF, Paris, FR;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L / ;
U.S. Cl.
CPC ...
178 68 ; 3403 / ;
Abstract

A bit stream with a bit rate equaling the frequency of a train of accompanying clock pulses is transcoded into a two-level signal voltage having a reduced rate of changeover compared with the rate of alternation between 0 and 1 bits. Upon any shift from one kind of bit (e.g., 0) to the other kind of bit (e.g., 1), a transition between signal-voltage levels occurs in the middle of a clock-pulse cycle; the first bit of the first-mentioned kind (0) in a succession of a plurality of such bits, after a shift from the other kind of bit (1), is translated into a transition between signal-voltage levels occurring at the end of the corresponding clock-pulse cycle. Transcoding is accomplished with the aid of a three-stage shift register whose stage outputs are logically combined. Upon transmission of the signal voltage via a data channel to a remote receiver, the original bit stream is reconstituted by a decoder comprising a four-stage shift register stepped at twice the clock-pulse frequency, again with logical combination of the stage outputs. A timing-signal extractor at the receiver is locked in step with the transmitter, prior to data transmission, under the control of a synchronizing sequence of alternating 0 and 1 bits transcoded into a square wave of half the clock-pulse frequency.


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