The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 2026

Filed:

Mar. 21, 2022
Applicant:

Semiconductor Components Industries, Llc, Phoenix, AZ (US);

Inventors:

Prasad Venkatraman, Gilbert, AZ (US);

Peter Burke, Portland, OR (US);

Gary Horst Loechelt, Tempe, AZ (US);

Balaji Padmanabhan, Chandler, AZ (US);

Emily M. Linehan, Gilbert, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 64/00 (2025.01); H10D 64/01 (2025.01); H10D 64/27 (2025.01);
U.S. Cl.
CPC ...
H10D 64/117 (2025.01); H10D 64/01 (2025.01); H10D 64/513 (2025.01);
Abstract

A method includes defining a plurality of trenches of a first type that extend in a longitudinal direction in a semiconductor substrate, and defining a trench of a second type extending in a lateral direction and intersecting the plurality of trenches of the first type. The trench of the second type is in fluid communication with each of the intersected plurality of trenches of the first type. The method further includes disposing a shield poly layer in the plurality of trenches of the first type and the trench of the second type, disposing an inter-poly dielectric layer and a gate poly layer above the shield poly layer in the plurality of trenches of the first type and the trench of the second type, and forming an electrical contact to the shield poly layer through an opening in the inter-poly dielectric layer and the gate poly layer disposed in the trench of the second type.


Find Patent Forward Citations

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Venkatraman, Prasad. (2026). Shield contact layout for power mosfets (U.S. Patent No. 12796049). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12796049

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