The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 2026

Filed:

Feb. 27, 2024
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Haruka Sakuma, Yokkaichi Mie, JP;

Masumi Saitoh, Yokohama Kanagawa, JP;

Kouji Matsuo, Ama Aichi, JP;

Assignee:

KIOXIA CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10B 53/20 (2023.01); H10B 53/10 (2023.01); H10D 64/01 (2025.01); H10D 64/68 (2025.01); H10W 20/41 (2026.01);
U.S. Cl.
CPC ...
H10B 53/20 (2023.02); H10B 53/10 (2023.02); H10D 64/033 (2025.01); H10D 64/691 (2025.01); H10W 20/435 (2026.01);
Abstract

A memory device includes: a first electrode layer extending in a first direction intersecting a surface of a substrate; a second electrode layer extending in the first direction; a first conductive layer surrounding the first electrode layer and the second electrode layer; a first insulating layer between the first electrode layer and the first conductive layer, surrounding the first electrode layer, and including hafnium oxide and/or zirconium oxide; a second insulating layer between the second electrode layer and the first conductive layer, surrounding the second electrode layer, and including hafnium oxide and/or zirconium oxide; a first gate electrode layer extending in the first direction, a first semiconductor layer surrounding the first gate electrode layer and electrically connected to the first conductive layer; and a first gate insulating layer between the first gate electrode layer and the first semiconductor layer and surrounding the first gate electrode layer.


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Sakuma, Haruka. (2026). Memory device (U.S. Patent No. 12795942). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12795942

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