The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 2026

Filed:

Nov. 10, 2022
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Chanmi Lee, Suwon-si, KR;

Yuna Lee, Hwaseong-si, KR;

Sangwuk Park, Hwaseong-si, KR;

Jungpyo Hong, Gwangmyeong-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 12/00 (2023.01);
U.S. Cl.
CPC ...
H10B 12/485 (2023.02); H10B 12/053 (2023.02); H10B 12/315 (2023.02); H10B 12/34 (2023.02); H10B 12/482 (2023.02);
Abstract

A semiconductor memory device may be formed by a method of fabricating the same. The method may include forming a buffer insulating layer on a semiconductor substrate including active portions, forming bit line structures on the buffer insulating layer, forming bit line spacers on side surfaces of each of the bit line structures, patterning the buffer insulating layer to form gap regions extending in a first direction, the gap regions formed between the bit line structures and exposing portions of the active portions, forming a protection oxide layer to cover the portions of the active portions exposed through the gap regions, forming a mold layer to fill the gap regions, in which the protection oxide layer is formed, forming mold patterns respectively in each of the gap regions to be spaced apart from each other, forming fence patterns in each of the gap regions and between the mold patterns, removing the mold patterns to form contact regions exposing the protection oxide layer, removing the protection oxide layer, and forming buried contact patterns in the contact regions to contact the portions of the active portions.


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Lee, Chanmi. (2026). Method of fabricating semiconductor memory device (U.S. Patent No. 12795900). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12795900

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