The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 2026

Filed:

Oct. 27, 2023
Applicant:

Semiconductor Energy Laboratory Co., Ltd., Kanagawa-ken, JP;

Inventors:

Masashi Fujita, Fuchu, JP;

Yoshiyuki Kurokawa, Sagamihara, JP;

Hiromichi Godo, Isehara, JP;

Kazuaki Ohshima, Atsugi, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/0185 (2006.01); G09G 3/20 (2006.01); H03K 3/356 (2006.01);
U.S. Cl.
CPC ...
H03K 19/018521 (2013.01); G09G 3/20 (2013.01); H03K 3/356017 (2013.01);
Abstract

A semiconductor device or the like with reduced power consumption is provided. A highly reliable semiconductor device or the like is provided. A semiconductor device or the like in which an increase in circuit layout area is inhibited is provided. A power-saving semiconductor device is provided. A semiconductor device or the like having excellent computing performance is provided. An output from a level shifter is supplied to a first buffer circuit. An output from the level shifter is supplied to a second buffer circuit through the first buffer circuit. By supplying an output from the first buffer circuit to a first register group, in each of a plurality of registers in a first register group, data of a scan flip-flop is saved in a storage circuit. By supplying an output from the second buffer circuit to a second register group, in each of a plurality of registers in a second register group, the data of the scan flip-flop is saved in the storage circuit.


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Fujita, Masashi. (2026). Semiconductor device and operation method of the semiconductor device (U.S. Patent No. 12794475). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12794475

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