The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 2026

Filed:

Aug. 31, 2022
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Kishore Kasichainula, Phoenix, AZ (US);

Kshitij Arun Doshi, Tempe, AZ (US);

Francesc Guim Bernat, Barcelona, ES;

Assignee:

Intel Products IP LLC, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/00 (2006.01); G06F 9/4401 (2018.01); G06F 13/26 (2006.01); G06F 13/28 (2006.01);
U.S. Cl.
CPC ...
G06F 13/26 (2013.01); G06F 9/4418 (2013.01); G06F 13/28 (2013.01);
Abstract

Methods, apparatus, systems, and articles of manufacture are disclosed to manage processor interrupts. An example apparatus includes at least one memory; instructions; and processor circuitry. The processor circuitry is to execute the instructions to receive an interrupt for a direct memory access to transfer a packet. The processor circuitry is to execute the instructions to decode a priority field in the packet to associate the interrupt with a traffic class. The processor circuitry is to execute the instructions to route the interrupt to an interrupt timer based on the traffic class, the interrupt timer to mask interrupts transmitted to the interrupt timer for a threshold period after receiving the interrupt. The processor circuitry is to execute the instructions to send the interrupt after the threshold period.


Find Patent Forward Citations

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Kasichainula, Kishore. (2026). Method for network interface card (nic) having instruction for delaying delivery of an interrupt to cpu based on type of traffic class of received packet (U.S. Patent No. 12792539). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12792539

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