The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 2026

Filed:

Jan. 16, 2024
Applicant:

Cisco Technology, Inc., San Jose, CA (US);

Inventors:

Radha Krishnaiah Pusapati, Fremont, CA (US);

Shiv Prakash Saini, Fremont, CA (US);

Assignee:

Cisco Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/28 (2006.01); G06F 8/61 (2018.01); G06F 8/65 (2018.01); G06F 30/20 (2020.01); H04L 41/082 (2022.01);
U.S. Cl.
CPC ...
G06F 8/63 (2013.01); G06F 8/65 (2013.01); G06F 13/28 (2013.01); G06F 30/20 (2020.01); H04L 41/082 (2013.01);
Abstract

In one embodiment, a method may receive a request to upgrade software for a switch. The method may use an application-specific integrated circuit (ASIC) simulator to generate a digital twin to store a first image and a first configuration of the switch. The method may use the digital twin to generate a second image and a second configuration by replaying the first configuration on the first image. The method may communicate the second image and the second configuration from the digital twin to an ASIC memory of an ASIC associated with the switch by applying batch direct memory access (DMA).


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Pusapati, Radha. (2026). Systems and methods for cold boot using digital twin (U.S. Patent No. 12792333). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12792333

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