The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2026

Filed:

Mar. 25, 2024
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Jeewoong Kim, Suwon-si, KR;

Hidenobu Fukutome, Suwon-si, KR;

Jinkyu Kim, Suwon-si, KR;

Yunsuk Nam, Suwon-si, KR;

Dongyun Lee, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 62/10 (2025.01); H10D 30/43 (2025.01); H10D 30/67 (2025.01); H10D 64/23 (2025.01);
U.S. Cl.
CPC ...
H10D 62/121 (2025.01); H10D 30/43 (2025.01); H10D 30/6729 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 64/258 (2025.01);
Abstract

A semiconductor device includes: insulating patterns spaced apart from each other in a first direction and in a second direction that intersects the first direction; a substrate insulating layer on first side surfaces of the insulating patterns; a device isolation layer on second side surfaces of the insulating patterns; channel layers on the insulating patterns and spaced apart from each other in a vertical direction that is perpendicular to an upper surface of the device isolation layer; gate structures vertically overlapping the insulating patterns, surrounding each of the channel layers, and extending in the second direction; source/drain regions provided outside the gate structures; and backside contact structures electrically connected to the source/drain regions and provided below the source/drain regions, wherein the insulating patterns include protrusions protruding in the vertical direction from an upper surface of the device isolation layer, and, in a region in which the insulating patterns vertically overlap the gate structures, a vertical distance between a lower surface of a lowermost channel layer among the channel layers and an upper surface of the protrusions is greater than a vertical distance between the channel layers.


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Kim, Jeewoong. (2026). Semiconductor devices (U.S. Patent No. 12787383). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12787383

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