The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2026

Filed:

Mar. 22, 2024
Applicant:

Ibiden Co., Ltd., Gifu, JP;

Inventors:

Masashi Kuwabara, Ibi-gun, JP;

Jun Sakai, Ogaki, JP;

Shiho Fukushima, Ibi-gun, JP;

Assignee:

IBIDEN CO., LTD., Ogaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/11 (2006.01); H05K 1/03 (2006.01); H05K 3/16 (2006.01);
U.S. Cl.
CPC ...
H05K 1/115 (2013.01); H05K 1/0306 (2013.01); H05K 3/16 (2013.01); H05K 2201/0209 (2013.01); H05K 2201/0242 (2013.01); H05K 2201/0266 (2013.01); H05K 2201/032 (2013.01); H05K 2201/09536 (2013.01);
Abstract

A wiring substrate includes a core substrate including a through-hole conductor, a first resin insulating layer, a first conductor layer including a seed layer and an electrolytic plating layer, a via conductor formed such that the via conductor electrically connects the through-hole conductor and first conductor layer, and a second resin insulating layer covering the first conductor layer. The core substrate includes a glass substrate such that the through-hole conductor is penetrating through the glass substrate, the seed layer includes a first layer formed on the first resin insulating layer and a second layer formed on the first layer, and the first conductor layer includes a conductor circuit such that a width of the first layer is larger than a width of the second layer in the conductor circuit and a width of the electrolytic plating layer is larger than the width of the first layer in the conductor circuit.


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Kuwabara, Masashi. (2026). Wiring substrate (U.S. Patent No. 12787169). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12787169

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