Phase-locked loop with improved process, frequency, and temperature independence

Abstract

A technique for reducing effects of variations in process, voltage, and temperature (PVT) on the performance of a fractional-N frequency synthesizer includes making loop parameters, e.g., damping factor ζ and loop bandwidth ω, first-order independent of PVT variations. In an embodiment of a fractional-N frequency synthesizer, a voltage-controlled oscillator is implemented using a ring-oscillator realized by an odd number of inverter stages. By making the loop parameters a multiple of frequency fand a ratio of components (e.g., C/C, where capacitance Crepresents the load of each stage of the ring oscillator) and self-biasing the phase-locked loop, the technique makes the ratio of loop bandwidth ωto the operating frequency fconstant in response to PVT variations.