The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 03, 2026
Filed:
Jan. 13, 2025
National Yang Ming Chiao Tung University, Hsinchu City, TW;
NATIONAL YANG MING CHIAO TUNG UNIVERSITY, Hsinchu City, TW;
Abstract
A multi-phase dual-edge digital pulse width modulation device includes a delay locked loop, a delay locked loop logic circuit, and at least one digital pulse width modulation logic circuit. The delay locked loop receives an input clock signal and thereby sequentially generates first delayed clock signals and a second delayed clock signal. All first delayed clock signals are alternately divided into a first group and a second group. The delay locked loop generates a synchronous clock signal, first synchronous delayed clock signals, and second synchronous delayed clock signals and transmits them to the digital pulse width modulation logic circuit to generates a pulse width modulation signal in response to a control digital code. The time occupied by the high voltage level of the pulse width modulation signal is positively correlated with the value of the control digital code.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile