The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 03, 2026
Filed:
Jun. 10, 2025
Sandisk Technologies, Inc., Milpitas, CA (US);
Sandisk Technologies, Inc., Milpitas, CA (US);
Abstract
On memory die and other circuits, some parts may operate at a VDD logic level while other elements operate at a higher logic level, such as at or near the die's supply level VSUP. To reduce power consumption and increase operating speeds, VDD levels are moving to increasingly lower voltages. To raise the logic signal from the lower level to the higher, level shifters can be used. However, as the gap between the supply level VSUP and VDD widens, it can become difficult for a level shifter to reliably raise a logic signal operating at the VDD level to the VSUP level. To address this problem, current mirrors are used to drive the NMOSs of the legs of the level shifter's leg's NMOS, providing robust operation even at low VDD levels.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile