The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2026

Filed:

Apr. 30, 2025
Applicant:

The Boeing Company, Arlington, VA (US);

Inventors:

Brian Kenneth Kormanyos, Edmonds, WA (US);

Eric M. Kawalsky, Torrance, CA (US);

Assignee:

The Boeing Company, Arlington, VA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/0185 (2006.01); H03K 17/687 (2006.01);
U.S. Cl.
CPC ...
H03K 17/6871 (2013.01); H03K 19/018507 (2013.01);
Abstract

A logic circuit includes an input stage and an output stage. The input stage includes an input level shifter comprising a first resistor and a second resistor, and a set of one or more input n-channel depletion mode devices that have respective gate terminals, source terminals, and drain terminals. A gate terminal of each input n-channel depletion mode device is configured as an input of the logic circuit, a drain terminal of the input n-channel depletion mode device is connected to a positive voltage supply, and a source terminal of the input n-channel depletion mode device is connected to a negative voltage supply through the input level shifter. The output stage includes an output of the logic circuit, a third resistor, a first output n-channel depletion mode device, a second output n-channel depletion mode device, and a set of one or more diodes arranged in an n-channel push-pull output configuration.


Find Patent Forward Citations

Quick Actions:

Kormanyos, Brian. (2026). Depletion mode integrated circuit with a logic circuit that utilizes an input level shifter and an n-channel push-pull output configuration (U.S. Patent No. 12785680). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12785680

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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