The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 03, 2026
Filed:
Sep. 18, 2023
Magnachip Semiconductor, Ltd., Cheongju-si, KR;
Myungwoo Lee, Seongnam-si, KR;
Hyungseok Kim, Suwon-si, KR;
MagnaChip Semiconductor, Ltd., Cheongju-si, KR;
Abstract
A buffer circuit for generating an output voltage according to an input voltage includes: an input stage configured to provide a first differential current to a load stage or receive a second differential current from the load stage based on a difference between the input voltage and the output voltage; the load stage configured to apply gate voltages to a first output transistor and a second output transistor of an output stage based on the first differential current or the second differential current; the output stage configured to regulate the output voltage based on the gate voltages applied to the first output transistor and the second output transistor; and a slew rate compensator configured to provide a source current to the load stage or receive a sink current from the load stage to regulate the gate voltages of the first output transistor and the second output transistor.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile