The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2026

Filed:

Apr. 13, 2023
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventor:

Martin L. Voogel, Niwot, CO (US);

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/347 (2020.01); G06F 30/394 (2020.01); H10W 70/60 (2026.01); G06F 115/02 (2020.01);
U.S. Cl.
CPC ...
G06F 30/347 (2020.01); G06F 30/394 (2020.01); H10W 70/611 (2026.01); G06F 2115/02 (2020.01);
Abstract

Embodiments herein describe arranging TX and RX circuitry in ICs such that rotated and mirrored ICs are aligned when connected in a multiple-chip device. In one embodiment, the TX circuitry (e.g., TX physical layer or PHY) is arranged in one row while the RX circuitry (e.g., RX physical layer or PHY) is arranged in another row. As such, when an IC is rotated or mirrored, at least one TX PHY is aligned with a RX PHY on the other IC. As such, non-crossing chip-to-chip connections can be formed through the interposer.


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Voogel, Martin. (2026). Aligning multi-chip devices (U.S. Patent No. 12783771). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12783771

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