The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2026

Filed:

Dec. 27, 2023
Applicant:

Asm Ip Holding B.v., Almere, NL;

Inventors:

Sandeep Ghosh, Chandler, AZ (US);

Robinson James, Phoenix, AZ (US);

Caleb Miskin, Mesa, AZ (US);

Amir Kajbafvala, Chandler, AZ (US);

Arun Murali, Tempe, AZ (US);

Frederick Aryeetey, Phoenix, AZ (US);

Alexandros Demos, Scottsdale, AZ (US);

Assignee:

ASM IP Holding B.V., Almere, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
C30B 25/16 (2006.01); C23C 16/24 (2006.01); C23C 16/52 (2006.01); C30B 25/10 (2006.01); C30B 29/06 (2006.01); G01B 21/08 (2006.01); H10P 14/20 (2026.01); H10P 14/24 (2026.01);
U.S. Cl.
CPC ...
C30B 25/16 (2013.01); C23C 16/24 (2013.01); C23C 16/52 (2013.01); C30B 25/10 (2013.01); C30B 29/06 (2013.01); G01B 21/08 (2013.01); H10P 14/24 (2026.01); H10P 14/3411 (2026.01); H10P 14/3442 (2026.01);
Abstract

A semiconductor processing system includes a precursor delivery arrangement, a chamber arrangement, and a controller. The chamber arrangement is connected to the precursor delivery arrangement. The controller is operatively connected to the precursor delivery arrangement and the chamber arrangement, includes a processor disposed in communication with a memory, and is responsive to instructions recorded on the memory to acquire a baseline substrate thickness profile for a selected process recipe, determine a first temperature profile setting for depositing a first material layer at low pressure for the selected process recipe, determine a high-pressure thermal offset for the first temperature profile setting, apply the high-pressure thermal offset to the first temperature profile setting to determine a second temperature profile setting, seat a first substrate on the first substrate support within the chamber arrangement and flow a second material layer precursor via the precursor delivery arrangement over the first substrate at high pressure according to the selected process recipe using the second temperature profile setting.


Find Patent Forward Citations

Quick Actions:

Ghosh, Sandeep. (2026). Thermal monitor for high pressure processing (U.S. Patent No. 12781388). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12781388

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