The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 27, 2026

Filed:

Nov. 01, 2022
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Sunkyoung Seo, Cheonan-si, KR;

Chajea Jo, Yongin-si, KR;

Yeongseon Kim, Suwon-si, KR;

Juhyeon Kim, Cheonan-si, KR;

Hyoeun Kim, Cheonan-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10W 20/20 (2026.01); H10W 72/90 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10W 20/20 (2026.01); H10W 90/00 (2026.01); H10W 72/921 (2026.01); H10W 72/951 (2026.01); H10W 72/952 (2026.01); H10W 90/792 (2026.01);
Abstract

A first semiconductor chip includes a first semiconductor substrate, a first wiring structure arranged on the first semiconductor substrate, a plurality of through electrodes penetrating through at least a portion of the first semiconductor substrate, and a plurality of first bonding pads respectively connected to the plurality of through electrodes. A second semiconductor chip is stacked on the first semiconductor chip and includes a second semiconductor substrate, a second wiring structure arranged on the second semiconductor substrate, and a second bonding pad connected to each of the plurality of first bonding pads and arranged on the active surface of the second semiconductor substrate. Each first bonding pad has a top surface that is in direct contact with the second bonding pad and a bottom surface that is in direct contact with one through electrode.


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Seo, Sunkyoung. (2026). Semiconductor package (U.S. Patent No. 12777907). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12777907

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