Method of manufacturing memory device having a source layer

Abstract

A method of manufacturing a memory device includes forming a preliminary gate stack structure including interlayer insulating layers and sacrificial patterns stacked on a substrate, a channel hole passing through the preliminary gate stack structure, a memory layer extending along a surface of the channel hole, and a channel layer extending along a surface of the memory layer. The method also includes forming a gate stack structure by replacing the plurality of sacrificial patterns with a plurality of conductive patterns, removing the substrate, removing a portion of the memory layer to expose a portion of the channel layer, forming an upper insulating layer to cover a portion of an exposed channel layer and the gate stack structure, removing a portion of the upper insulating layer to expose the portion of the channel layer, and forming a source layer covering the portion of the exposed channel layer.