The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 27, 2026

Filed:

Oct. 30, 2024
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Srikanth Manian, Bangalore, IN;

Anant Kamath, Bangalore, IN;

Rohan Regi, Gurugram, IN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/14 (2014.01); H03M 1/12 (2006.01); H03K 5/00 (2006.01); H03K 5/135 (2006.01);
U.S. Cl.
CPC ...
H03K 5/14 (2013.01); H03M 1/12 (2013.01); H03K 2005/00247 (2013.01); H03K 5/135 (2013.01);
Abstract

An example apparatus includes: a first delay buffer having a clock input, a bias input coupled to a delay control input, a reset input, and an output; a second delay buffer having a clock input coupled to the output of the first delay buffer, a bias input coupled to the delay control input, a reset input, and an output; and a counter having a clock input coupled to the output of the second delay buffer, a reset output coupled to a clear input of the first delay buffer and the clear input coupled to the second delay buffer, and an output.


Find Patent Forward Citations

Manian, Srikanth. (2026). Methods and apparatus to implement delay lines and analog to digital converters (U.S. Patent No. 12776767). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12776767

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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