Gate driver, display apparatus including the same and electronic apparatus including the same

Abstract

A gate driver includes an input circuit transmitting an input signal to a Q-node in response to a first clock signal, a first A-node control circuit controlling an A-node in response to the first clock signal or the Q-node, a second A-node control circuit controlling the A-node in response to a second clock signal, a B-node control circuit controlling a B-node in response to the first clock signal and the Q-node, a C-node control circuit controlling a C-node in response to the B-node, a first QB-node control circuit controlling a QB-node in response to the second clock signal, a second QB-node control circuit controlling the QB-node in response to the Q-node, a pull-up circuit pulling up a gate output signal to a high power voltage in response to the QB-node and a pull-down circuit pulling down the gate output signal to a low power voltage in response to the Q-node.