The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 27, 2026

Filed:

Dec. 17, 2024
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Yosuke Mitsumasu, Hadano, JP;

Ryoichi Kato, Yokohama, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 3/064 (2013.01); G06F 3/0604 (2013.01); G06F 3/0652 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01);
Abstract

A memory system includes a nonvolatile memory including a plurality of blocks, and a controller. The controller manages a plurality of streams and allocates a first erased block for which a data erase operation has been completed among the plurality of blocks as a general-purpose block. In a case where use of a first stream among the plurality of streams is started, if two or more erased blocks for which the data erase operation has been completed are included in the plurality of blocks, the controller allocates a second erased block as the write destination block corresponding to the first stream, and if two or more erased blocks for which the data erase operation has been completed are not included in the plurality of blocks, sets the first erased block as the write destination block.


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Mitsumasu, Yosuke. (2026). Memory system (U.S. Patent No. 12775408). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12775408

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