The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 27, 2026
Filed:
Aug. 31, 2022
Xilinx, Inc., San Jose, CA (US);
Jorn Tuyls, Leinster, IE;
Xiao Teng, Cupertino, CA (US);
Sanket Pandit, San Jose, CA (US);
Rajeev Patwari, San Jose, CA (US);
Qian Zhou, Beijing, CN;
Ehsan Ghasemi, San Jose, CA (US);
Ephrem C. Wu, San Mateo, CA (US);
Elliott Delaye, San Jose, CA (US);
Aaron Ng, San Jose, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
Instruction generation for a data processing array and microcontroller includes generating a tensor-level intermediate representation from a machine learning model using kernel expressions. Statements of the tensor-level intermediate representation are partitioned into a first set of statements and a second set of statements. From the first set of statements, kernel instructions are generated based on a reconfigurable neural engine model. The kernel instructions are executable by a compute tile of a data processing array to implement compute functions of the machine learning model. From the set of second statements, microcontroller instructions are generated based on a super-graph model. The microcontroller instructions are executable by a microcontroller of the data processing array to move data into and out from the data processing array.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile