Multi-threshold voltage semiconductor device and method for fabricating same

Abstract

A multi-threshold voltage semiconductor device and a method for fabricating the device are disclosed, in which a first metal material layer is formed on exposed dielectric layer in a part of gate trenches, and an annealing process is then carried out to cause diffusion of metal ions from the first metal material layer into the corresponding portion(s) of the high-k dielectric layer. In this way, two different threshold voltages can be achieved simply with one photolithography process and one etching process. More different threshold voltages can be achieved by adding photolithography processes. As fewer photolithography and etching processes are involved, the multi-threshold voltage semiconductor device can be fabricated at lower cost and exhibits improved consistency.