Processor activity instrumentation processing for cryptographic instructions

Abstract

An instruction to perform cryptographic processing is executed. Executing the instruction includes performing a plurality of operations to generate a cryptographic result. Based on performing at least multiple operations of the plurality of operations, an access exception condition for a storage location used by an instrumentation counter is detected. Based on detecting the access exception condition, execution of the instruction is interrupted. The instruction is re-executed to obtain access to the instrumentation counter. The re-executing the instruction starts from where execution was interrupted and includes updating the instrumentation counter, based on the storage location used for the instrumentation counter being validated.