The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 2026

Filed:

Jul. 30, 2024
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Vijay Kiran Kalyanam, Austin, TX (US);

Todd Robert Sutton, Del Mar, CA (US);

Suresh Kumar Venkumahanti, Austin, TX (US);

Chi-Jui Chung, Austin, TX (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G05F 1/56 (2006.01); G06F 11/30 (2006.01); H03K 5/1252 (2006.01);
U.S. Cl.
CPC ...
H03K 5/1252 (2013.01); G05F 1/56 (2013.01);
Abstract

A method for voltage regulator noise mitigation with processor control is described. The method includes monitoring a power consumption of a sum of processor threads during thread pipeline execution. The method also includes detecting a voltage regulator noise when the power consumption exceeds a slew power threshold. The method further includes controlling slew ramp-up steps of all the processor threads according to a selected throttle control.


Find Patent Forward Citations

Kalyanam, Vijay. (2026). Voltage regulator noise mitigation with processor control (U.S. Patent No. 12771331). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12771331

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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