The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 2026

Filed:

Dec. 21, 2023
Applicants:

National Technology & Engineering Solutions of Sandia, Llc, Albuquerque, NM (US);

University of Virginia Patent Foundation, Charlottesville, VA (US);

Inventors:

Michael David Henry, Albuquerque, NM (US);

Todd Bauer, Albuquerque, NM (US);

Giovanni Esteves, Albuquerque, NM (US);

Jon F. Ihlefeld, Charlottesville, VA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/22 (2006.01);
U.S. Cl.
CPC ...
G11C 11/2275 (2013.01); G11C 11/2273 (2013.01); G11C 11/2277 (2013.01);
Abstract

A new form of logic and processing functionality, complementary ferroelectric logic (CFL), which employs ferroelectric tunnel junction (FTJ) devices as the underlying building blocks, is disclosed. By interconnecting the FTJ devices, one can implement various logical functions and memory devices. Of particular note is that the memory devices retain their written states even when power is removed, i.e., CFL memory is nonvolatile, due to the polarization retention properties of the ferroelectric material in the FTJ devices. Exemplary CFL logic functions include inverter (NOR), NAND, and multi-input comparison circuits. The CFL circuits include a writing pulse step to store either a logic '0' or “1” state, followed by a low voltage read pulse to output the implemented logic function. Due to the CMOS-compatible processes required to fabricate CFL circuits, CFL may be heterogeneously integrated with standard CMOS circuitry.


Find Patent Forward Citations

Henry, Michael. (2026). Complementary ferroelectric logic (U.S. Patent No. 12770669). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12770669

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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